HW Features

Intel

Processor tracing

• Intel Processor Tracing, 2013
  • Specification:Intel® Architecture Instruction Set Extensions Programming Reference as Chapter 11
  • Processor Trace Decoder Library Intel Skylake 处理器(第6代), 2015

Memory Bandwidth

Memory Bandwidth Monitoring (MBM)

Cache

Cache monitoring technology

Cache Monitoring Technology (CMT) is a new feature that allows an operating system (OS) or hypervisor or virtual machine monitor (VMM) to determine the usage of cache by applications running on the platform. Use CMT to do the following:

• To detect if the platform supports this monitoring capability (via CPUID)
• For an OS or VMM to assign an ID for each of the applications or VMs that are scheduled to run on a core. This ID is called the Resource Monitoring ID (RMID).
• To monitor cache occupancy on a per-RMID basis
• For an OS or VMM to read last level cache occupancy for a given RMID at any time

Cache allocation technology

Cache Allocation Technology (CAT) is a new feature that allows an OS, hypervisor, or VMM to control allocation of a CPU’s shared last-level cache. Once CAT is configured, the processor allows access to portions of the cache according to the established class of service (COS). The processor obeys the COS rules when it runs an application thread or application process. This can be accomplished by performing these steps:

• Determine if the CPU supports the CAT feature. See the Supported Processors table for the six Intel® Xeon® processors that support the CAT feature.
• Configure the COS to define the amount of resources (cache space) available. This configuration is at the processor level and is common to all logical processors.
• Associate each logical processor with an available COS.
• Run the application on the logical processor that uses the desired COS.

2015, 第4代志强

CAT By means of defining and assigning a class of service to each core, the user can assign portions of the LLC to particular cores by limiting the amount of the LLC into which each core is able to allocate cache lines. Because the core is only able to allocate cache lines into its assigned portion of the cache, it is no longer possible for the core to evict cache lines outside of this region.